1. Field of the Invention
The invention relates to a bandpass sigma-delta modulator outputting a bit stream. More particularly, this invention relates to a bandpass sigma-delta modulator that has a double-sampling rate, thereby reducing by half both the number of required amplifiers and the mismatch problems between capacitors. Thus, higher frequency operation can be easily achieved without additional analog circuits.
2. Description of Related Art
In modern wireless communication systems, progress in CMOS technology has made it possible for applications to utilize not only the digital signal process in the baseband, but also the analog signal process in the intermediate frequency (IF) band and the radio frequency (RF) band. Due to the robustness and precision of digital signal processing, however, more functions in the analog domain are being replaced with their equivalent digital counterparts.
In the receiver architectures, IF digitization or performing analog to digital conversion in the IF band overcomes the difficulties of single chip implementation in the superheterodyne receiver, and the problems of DC offset, flicker noise, phase error and I/Q gain mismatch in the direct-conversion receiver.
The bandpass delta-sigma (.DELTA..SIGMA.) modulator provides a versatile method of performing analog to digital conversion in the IF. In prior art, the central frequency is usually set as 1/4 of sampling rate, and the circuit performance limits the value of sampling rate. Generally, the IF is limited to 5 MHz, which is significantly lower than the standard IF of 10.7 MHz or 21.4 MHz.